1. Field of the Invention
The present invention relates to an amplifying circuit. More particularly, it relates to an amplifying circuit, which is suitable for an integrated circuit with the low-noise, high gain and low power consumption characteristics.
2. Description of the Prior Art
In recent years, movable communication terminals, such as a portable telephone, are spreading extensively. According to this fact, there is a demand for making a circuit of high frequency characteristic used for movable communication terminals, such as a portable telephone, micro-miniaturized. Moreover, there is also a demand for making an amplifying circuit, which has been composed of individual parts integrated.
Further, most of the movable communication terminals, such as a portable telephone, are driven with batteries. Accordingly, it is required to reduce current consumption for lengthening the period of life of a battery.
FIG. 19 is one structural example of a conventional transistor amplifying circuit.
In the diagram, a constant-current source I.sub.0 and a condenser C.sub.E connected to the constant-current source in parallel are connected to the emitter of a first transistor Q.sub.1. Also, a voltage source V.sub.CC is connected to the collector of the transistor Q.sub.1, via a load-resistor R.sub.C. A bias voltage V.sub.BB is supplied to the base of the transistor Q.sub.1.
Further, the conventional transistor amplifying circuit includes a second transistor Q.sub.2, of which the collector is connected to the voltage V.sub.CC and the emitter is connected to a resistor R.sub.E. Furthermore, an output from the collector of the first transistor Q.sub.1 is connected to the base of the second transistor Q.sub.2.
Moreover, the base of the transistor Q.sub.1 is used as an input terminal of a high-frequency signal, and the emitter of the transistor Q.sub.2 is used as an output terminal of the high-frequency signal. In this circuit, the transistor Q.sub.1 is an amplifying circuit of an emitter grounded type, and the transistor Q.sub.2 forms an emitter follower circuit for matching impedance with the circuit arranged behind the emitter follower circuit.
FIG. 20 further illustrates a structural example of the conventional transistor amplifying circuit including a bias circuit section 21. As is apparent from FIG. 20, the transistor amplifying circuit is composed of the amplifying circuit section 20 and the bias circuit section 21 for supplying a bias voltage required to each portion of the amplifying circuit.
In FIG. 20, the amplifying circuit section 20 corresponds to the transistor amplifying circuit shown in FIG. 19. The amplifying circuit section has a transistor Q.sub.3 and a resistor R.sub.E1, instead of the current source I.sub.0 shown in FIG. 19 and a transistor Q.sub.1 and a resistor R.sub.E2, instead of the resistor R.sub.E shown in FIG. 19.
The bias circuit section 21 shown in FIG. 20 supplies bias current source, that is, base potential of the transistors Q.sub.1, Q.sub.2, Q.sub.3, and Q.sub.4, required for the amplifying circuit section 20 positioned on the right side of the circuit of FIG. 20. The bias circuit section 21 is composed of a 2-line structured constant current circuit which has three transistors Q.sub.B1 to Q.sub.B3, and three transistors Q.sub.B4 to Q.sub.B6 laid lengthwise, respectively. Further, the transistors Q.sub.B2 to Q.sub.B3 and Q.sub.B5 to Q.sub.B6 function as diodes by connecting the bases and the collectors in common.
Meanwhile, in the transistor amplifying circuit of an emitter grounded type shown in FIGS. 19 and 20, noise amount (NF) of the circuit is generally proportional to the resistance of base resistor R.sub.b of a transistor used. Further, it is generally known that noise amount (NF) is inversely proportional to the second power of f.sub.t (cutoff frequency) of a transistor.
In FIGS. 19 and 20, a resistor R.sub.C is a collector load resistor of transistor Q.sub.1, which is an amplifying element. At the same time, the resistor R.sub.C also has a function of dropping the voltage to a suitable base potential of the transistor Q.sub.2 of the emitter follower circuit, which follows the transistor Q.sub.1.
In the above-described transistor amplifying circuit shown in FIGS. 19 and 20, collectors of the transistors Q.sub.1 and Q.sub.2 are connected to the voltage source V.sub.CC, respectively. Therefore, a consumption current of the amplifying circuit becomes the sum (I.sub.1 +I.sub.2) of the current I.sub.1, flowing into the transistor Q.sub.1 and the current I.sub.2 flowing into the transistor Q.sub.2.
Thus, when making the consumption current lower in this circuit, it becomes necessary to reduce both, the current I.sub.1 and the current I.sub.2. Accordingly, it brings a problem that the performance of the circuit is not sufficiently fulfilled in the case where the circuit is used as an amplifying circuit. Or, it brings another problem that the consumption current becomes large in the case where a satisfactory performance is obtained.
It also becomes necessary to have two rows of the circuits forming the bias circuit section 21, in FIG. 20. Therefore, the consumption current in the bias circuit section 21 becomes the sum (I.sub.B1 +I.sub.B2) of the currents I.sub.B1 and I.sub.B2, which respectively flow to each of constant current circuits, as well as in the amplifying circuit section 20. Accordingly, the circuit can not make the current amount lower.
Further, the base resistor R.sub.b of the grounded-emitter type transistor Q.sub.1 is practically determined according to the physical forms of individual transistors in general. Furthermore, the cutoff frequency f.sub.t is also determined according to the semiconductor process technique for manufacturing transistors.
If the current of the transistor amplifying circuit is made lower, there is a tendency that the cutoff frequency f.sub.t, becomes lower and the noise amount becomes worse.
The V.sub.ce (voltage between the collector and the emitter) of the transistor Q.sub.1 becomes smaller because of the voltage drop with the load resistor R.sub.c. It is generally known that the cutoff frequency f.sub.t of a transistor becomes lower, if the V.sub.ce of the transistor as large as possible, more particularly, in the case where a high-frequency circuit is required.
In another mode, an amplifying circuit is composed of a differential pair of transistors. FIG. 21 is a diagram showing one example of a conventional differential amplifying circuit composed by the differential pair of transistors.
In the diagram, the emitters of a pair of transistors Q.sub.11 and Q.sub.12 are connected in common, and connected to the constant current source I.sub.0. Further, the collectors of both transistors Q.sub.11 and Q.sub.12 are connected to the load resistors R.sub.C1 and R.sub.C2, respectively. Furthermore, the load resistors R.sub.C1 and R.sub.C2 are connected to the voltage source V.sub.CC.
In the differential amplifying circuit having the above-described structure, the current I.sub.C1 flows to the collector of the transistor Q.sub.11 and the current I.sub.C2 flows to the collector of the transistor Q.sub.12 according to the structure. If the current I.sub.C1 is equal to the current I.sub.C2, twice amount of current flows in comparison with that of the circuit having a single-end structure formed of the transistor Q.sub.1 shown in FIG. 19.
If the current is reduced, the output driving ability becomes lower. When the low impedance load is further connected, the characteristic of the circuit is deteriorated. Accordingly, as shown in FIG. 22, another transistor Q.sub.13 is connected to be an emitter follower, similarly to the conventional circuit shown in FIG. 19. There have been frequent cases where the load of the differential amplifying circuit is reduced in this fashion.
However, the consumption current becomes larger, in either case, if a larger current flows to the differential amplifying circuit, and if the emitter follower circuit is connected to reduce the current of the differential amplifying circuit.
Further, in the above description of the prior art, the amplifying circuit is formed by transistors. Alternatively, FIG. 23 shows a prior art of the differential amplifying circuit formed by FETs (Field Effect Transistors).
The differential pair is formed by two FETs T.sub.11 and T.sub.12, the source terminals of which are mutually connected. Further, the commonly connected source terminals are grounded via the constant current source I.sub.0. The consent current source I.sub.0 controls the sum (I.sub.11 +I.sub.12) of the currents flowing from the drain voltage V.sub.d1 to two FETs T.sub.11 and T.sub.12 so as to become constant.
The gate terminals of the FETs T.sub.11 and T.sub.12 are a non-inverse input terminal I and an inverse input terminal /I (hereinafter used /I means inversion of I), respectively, and the terminals are similarly connected to the gate bias voltage V.sub.g.
The drain terminals of the FETs T.sub.11 and T.sub.12 are connected to the drain voltage V.sub.d1 via the resistors R.sub.11 and R.sub.12, respectively. The drain terminals are connected to the gate terminals of the FETs T.sub.13 and T.sub.14, respectively.
The drain terminals of FETs T.sub.13 and T.sub.14 are connected to the drain voltage V.sub.d2, respectively. Further, the source terminals of the FETs T.sub.13 and T.sub.14 are grounded via the resistors R.sub.13 and R.sub.14, respectively, and simultaneously become a non-inverse output O and an inverse output /O (hereinafter used /0 means inversion of 0), respectively.
In this way, the differential amplifying circuit is symmetrical. The used FETs are also arranged symmetrically, and the current I.sub.11 flowing to the FET T.sub.11 is equal to the current I.sub.12 flowing to the FET T.sub.12. Simultaneously, the current I.sub.13 flowing to the FET T.sub.13 becomes equal to the current I.sub.14 flowing to the FET T.sub.14.
In the conventional circuit, the part composed of FETs T.sub.11 and T.sub.12, constant current source I.sub.0 and resistors R.sub.11 and R.sub.12 is a basic differential amplifying circuit. The FETs T.sub.13 and T.sub.14 form source follower circuits for matching the output impedance.
Here, the reason for providing the source follower circuit is the same as explained in connection with the conventional circuit shown in FIGS. 19 and 22. More particularly, it is known to use the characteristic impedance of 50 ohms when connecting high frequency circuits. However, the differential amplifying circuit has a high output impedance, so that an amplified signal cannot be outputted effectively, if the output terminal of the amplifying circuit is connected to a circuit having the characteristic impedance of 50 ohms, as it is. Therefore, the source follower circuit is required for conversing the impedance.
In such FET differential amplifying circuit, the difference of two high-frequency signals inputted to the non-inverse input terminal I and the inverse input terminal /I is amplified to output to the non-inverse output terminal O and the inverse output terminal /O, respectively.
The signals outputted from the non-inverse output terminal 0 and the inverse output terminal /0 have phases reversed with same amplitude.
FIG. 24 is a diagram showing the structure of an amplifying circuit formed by using the differential amplifying circuit shown in FIG. 23. As compared with the circuit shown in FIG. 23, the constant current source I.sub.0 is replaced with resistor R.sub.17, and it is grounded via resistors R.sub.15 and R.sub.16 instead of the gate bias voltage V.sub.g. Accordingly, the circuit realizes a self-biasing system.
According to the FET differential amplifying circuit having the structure shown in FIG. 24, it becomes possible to amplify and output high-frequency signals supplied to the non-inverse input terminal I and the inverse input terminal /I from the non-inverse output terminal O and the inverse output terminal /0, stably.
However, FETs T.sub.12 and T.sub.14 are connected to the drain voltages V.sub.d1 and V.sub.d2, respectively, as well as FETs T.sub.11 and T.sub.13 in the FET differential amplifying circuit shown in FIGS. 23 and 24. Therefore, the consumption current becomes a ground total of the sum (I.sub.11 +I.sub.13) of the currents flowing to the FETs T.sub.11 and T.sub.13 and the sum (I.sub.12 +I.sub.14) of the currents flowing to the FETs T.sub.12 and T.sub.14.
Accordingly, the consumption current of the circuit becomes larger. In such amplifying circuit having the above-described structure, it is required to reduce both the sum of I.sub.11 +I.sub.13 and the sum of I.sub.12 +I.sub.14, in order to make the consumption current lower. Consequently, it brings a problem that the circuit does not sufficiently fulfill its function as a differential amplifier because the gain is reduced.